Description: sdram的vhdl实现
本文介绍了sdram的控制时序特征,并介绍了采用vhdl语言实现的sdram控制器的关键技术-SDRAM This paper introduces the realization of SDRAM timing control features, and introduces the VHDL language SDRAM controller of the key technologies Platform: |
Size: 84992 |
Author:cxr |
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Description: ddr_sdram控制器的vhdl代码,里面的地址和数据长度可配置,能满足不同用户的需要.-ddr_sdram controller vhdl code, which addresses and the data length can be configured, meet the needs of different users. Platform: |
Size: 13312 |
Author:hxwf801 |
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Description: 这是我从网上找到的用vhdl语言写的sdram控制器的代码。我的邮箱:wleechina@163.com-This is what I found online vhdl language used to write the sdram controller code. My mail : wleechina@163.com Platform: |
Size: 339968 |
Author:李伟 |
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Description: SDRAM控制器的设计与VHDL实现
是pdf格式的。在工程中实现过-SDRAM Controller Design with VHDL realize is pdf format. In the projects implemented Platform: |
Size: 138240 |
Author:hjx |
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Description: 基于FPGA的SDRAM控制器的设计和实现,还比较好勒.-FPGA-based SDRAM controller design and realization, but also better le. Platform: |
Size: 69632 |
Author:rubyshirial |
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Description: 标准SRD SDRAM控制器参考设计,altera提供
Verilog代码,带有使用手册,大家试试交流一下
-Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some Platform: |
Size: 776192 |
Author:费尔德 |
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Description:
基于VHDL编写的DDR-SDRAM控制器的编程,目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller Platform: |
Size: 1031168 |
Author:wfs |
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Description: 基于VHDL编写的SDR-SDRAM控制器的编程,目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller Platform: |
Size: 1013760 |
Author:wfs |
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Description: 这个设计是使用Virtex-4实现DDR的控制器的,设计分为三个主要模块:Front-End FIFOs,DDR SDRAM Controller和Datapath Module。其中主要是DDR SDRAM Controller,当然还有测试模块。-This design is the use of Virtex-4 implementation of the DDR controller, the design is divided into three main modules: Front-End FIFOs, DDR SDRAM Controller and Datapath Module. Are one of the main DDR SDRAM Controller, of course, have the test module. Platform: |
Size: 477184 |
Author:fdasfds |
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Description: 这个是一个基于FPGA的SDRAM控制器系统,实现对SDRAM的读写操作,用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing Platform: |
Size: 2171904 |
Author:jyb |
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